Which project was the ERC grant awarded for?
The project that I presented to the ERC is entitled DAL, Defying Amdahl's Law. This law is the simple observation that the run time of an application cannot be shorter than the run time of its sequential part. Multi-core processors are now present everywhere in computing systems: servers, desktop computers, laptop computers, as well as smartphones, television and all embedded systems. In 2020, it will be technologically possible to integrate multi-core processors with more than 100 cores on a single component. However, everything indicates that sequential programming will always be predominant. Amdahl's law thus shows us that high performance on the sequential code is a necessary condition for high performance on the entire application. But instead of working to improve the architecture of the next generation of multi-core processors, for the DAL project, we have deliberately chosen to get ahead of the game in relation to these future generations. For the ALF team, "Defying Amdahl's Law" means proposing hardware and/or software mechanisms for the architectures of the "manycores" of 2020 making it possible to obtain very high performance on sequential applications and on the sequential sections of parallel applications.
What will this ERC grant enable you to achieve?
For me, being awarded the ERC advanced grant primarily represents the recognition of the work that I have performed throughout my career. This award also expresses the confidence in the vision that I set forth in the DAL proposal. The ERC grant also extends over five years. It therefore offers true financial independence to an entire team over a given period. For a long time, it has been difficult to find financing for high-performance microarchitecture research subjects. Thanks to the ERC grant, I will be able to recruit several PhD students and post-doctoral researchers onto our team for microarchitecture subjects without needing to search for other financing. I will also have the possibility of inviting colleagues for collaboration visits of two to three months. Lastly, this grant will allow us to finance the computing resources that we need for our research.
After receiving his PhD in computer sciences from Université de Rennes I, André Seznec joined the Inria research centre in Rennes in 1986. In 1994, he became senior research scientist and CAPS project-team leader (compiler, parallel architecture, and systems), a position he held until 2008. In 2009, he created the ALF team, which he currently leads. From 1999 to 2000, he spent a year in the laboratories of the manufacturer Compaq in Massachusetts.
At the start of his career, André Seznec worked on the architectures of supercomputers intended for scientific applications. In collaboration with other members of his team, he worked on the design of high-performance computing software and architecture simulation. Starting in 2002, in collaboration with a cryptography expert, he designed an unpredictable random number generator. Since 1991, his main research activity has focused on the architecture of microprocessors. He has particularly worked on pipelining, multithreading and multi-core processors. His most recognised contributions involve the structure of cache memories and branch predictors.
Throughout his career, André Seznec has supervised 15 PhD theses, published more than 20 articles in international journals, and presented 40 papers at the major conferences devoted to computer architecture, including 13 during the International Symposium on Computer Architecture (ISCA). In 2010, he presided over the ISCA conference in Saint-Malo.