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TEA Research team

Time, Events and Architectures

Team presentation

 

An embedded architecture is an artifact of heterogeneous constituents and at the crossing of several design viewpoints: software, embedded in hardware, interfaced with the physical world. Time takes different forms when observed from each of these viewpoints: continuous or discrete, event-based or time-triggered. Unfortunately, modeling and programming formalisms that represent software, hardware and physics significantly alter this perception of time. Moreover, time reasoning in system design is usually isolated to a specific design problem: simulation, profiling, performance, scheduling, parallelization, simulation. The aim of project-team TEA is to define conceptually unified frameworks for reasoning on composition and integration in cyber-physical system design. Tea aims at putting such reasoning to practice by revisiting analysis and synthesis issues in real-time system design with soundness and compositionality gained from formalization.

 

 

Research themes

Time modeling in system design

    •  Time systems and calculi — logical and algebraic representations
    •  Time abstractions and refinements — logical and algebraic relations among time domains
    •  Conformance and mitigation — Verification of timed quantitative properties, automated synthesis of adapters for synchronisation

Time as a viewpoint in system analysis

    •  Logic and quantitative reasoning for analysis and verification
    •  Type inference, abstract interpretation, SAT/SMT verification
    •  Control and schedule synthesis, abstract affine scheduling
    •  Types, modules, interface and contract algebra

Application to embedded system design

    •  An infrastructure for polychronous modeling, analysis and (translation validated) code generation, the Eclipse IWG Polarsys project Polychrony on Polarsys
    •  A standard for modeling time  in architecture analysis and design
    •  Architecture exploration, virtual prototyping, virtual integration

International and industrial relations

 

International grants

    •  Toyota Info-Technology Centre, 2014+
    •  US Air Force Office for Scientific Research, 2013+

National grants

    •  CORAC project CORAIL, 2014+
    •  FUI project P, 2011-2015
    •  ANR project FEEVER, 2014-2017
 
International collaborations

    •  IIT Kanpur, India, INRIA International Partner
    •  Hong Kong Applied Science and Technology Research Institute (ASTRI), INRIA International Partner
    •  The LIAMA project SACCADES with ECNU SEI
    •  The Embedded Systems Group at TU Kaiserslautern
    •  The SAE committee for AADL
    •  The Fermat Laboratory at Virginia Tech, 2003-2015

National collaborations

    •  The TOUTATIS network on formal methods for architecture design: LAAS, IRIT, ISAE, ONERA, Telecom Paris and UBO
    •  INRIA project-team AOSTE
    •  GRD GPL

Former projects

    •  Networks of excellence Artist, Artist 2, Artist Design (2000-2009)
    •  NSF-INRIA project BALBOA (2002-2009)
    •  DGE project TOPCASED (2005-2010)
    •  ANR project OPENEMBEDD (2006-2008, coordinator)
    •  IST project SPEEDS (2007)
    •  EADS Foundation grant (2006-2009)
    •  ANR project SPACIFY (2007-2010)
    •  ANR project FotoVP (2008-2010)
    •  Artemisia project CESAR (2009-2011)
    •  ITEA2 project OPEES (2010-2012, work-package leader)
    •  ANR project Verisync (2010-2014)
    •  INRIA associate project POLYCORE (2011-2013)
    •  Regional project VeriGALS (2011-2014)