COMPSYS Research team
Compilation and embedded computing systems
- Leader : Alain Darte
- Research center(s) : CRI Grenoble - Rhône-Alpes
- Field : Algorithmics, Programming, Software and Architecture
- Theme : Architecture, Languages and Compilation
- Partner(s) : CNRS,Ecole normale supérieure de Lyon,Université Claude Bernard (Lyon 1)
- Collaborator(s) : Laboratoire de l'Informatique du Parallélisme (LIP) (UMR5668)
Compsys was an Inria project-team until 2015, then Inria team until 2016, common to Laboratoire de l'Informatique du Parallélisme (LIP, Lyon). The team was located at Ecole normale supérieure de Lyon (ENS Lyon).
Compsys has been developing compilation techniques, more precisely code analysis and code optimization techniques, to help programming or designing “embedded computing systems” and platforms for “small” HPC (High-Performance Computing). The team focused first on both low-level (back-end) optimizations and high-level (front-end, mainly source-to-source) transformations, for specialized embedded processors (DSP) and high-level synthesis of hardware accelerators (FPGA). More recent activities included a shift towards abstract interpretation and program termination, the compilation for GPUs and multicores, and the analysis of parallel languages. The main characteristic of Compsys is its use of algorithmic and formal methods (with graph algorithms, linear programming, polyhedral optimizations) to address code analysis and optimization problems (e.g., termination, register allocation, memory optimizations, scheduling, automatic generation of interfaces) and the validation of these techniques through the development of compilation tools.
The last research directions included:
- Back-end code analysis including fast scalar liveness analysis, register spilling analysis, pointer and
- Polyhedral code analysis and optimizations, including communication analysis for kernel offloading to FPGA and GPU, analysis of while loops, analysis of parallel and streaming languages (liveness, memory folding, race detection), parametric tiling, polynomial extensions.
- Move towards the community of HPC users in numerical simulation.
Keywords: Compilation Code analysis Code optimization Memory optimization Combinatorial optimization Algorithmics Polyhedral optimization Hardware accelerators High-level synthesis High-performance computing Multicore GPU FPGA DSP.